Senior Digital Desi Engineer – RISC-V in Hamburg bei NXP Semiconductors

Senior Digital Design Engineer – RISC-V (f/m/d)

Become a member of an experienced, international R&D team that is responsible for the architecture of new, differentiating, digital IP acceleration domains used in the design of advanced microcontrollers and microprocessors-based chips. The technology for which this team is responsible provides market differentiation of a product portfolio with over four billion USD in annual revenue. Chances are that the car you drive, the intelligent devices that pervade your living space, and the factories that produce the goods you use will contain one or more of the chips that you contribute to.

We are part of MCU/MPU Engineering, a central design organization within NXP, developing products for multiple business lines in Automotive, Internet of Things (IoT), Networking, and Radio Frequency products, with expertise in hardware engineering, including architecture, IP, and full SoC Design.

Job Summary:

• NXP is looking for an experienced Digital Designer to work on RISC-V IPs for MCU and MPU class systems in various application domains. The key focus is the efficient implementation of RISC-V CPUs for embedded systems.

• You will work on longer-term research projects as well as on product IPs.

• You will mainly work on Verilog-based RTL design and simulation. Also, running physical synthesis and STA (‘’physical-aware design’’) will be required to be successful in this role.

• The candidate will be part of a dynamic and innovative team, pushing the embedded computer architecture field forward.

Key Challenges:

• You will leverage broad technical skills in hardware design and computer architecture to develop best-in-class RISC-V IPs.

• Fast problem-solving will be a critical skill as the product life cycle matures and gets closer to chip tape-out.

Cross-functional aspects:

• You will interact with external teams including those leading the architecture, software tools and compilers, SOC performance models, and logic verification. Some external teams are located in other regions of the world. Thus, excellent communication skills are required to be successful in this role.

• The digital IP team is led by Directors and Fellows with many years of domain experience to leverage and further develop skills useful as you advance your career.

Job Qualifications:

• Degree: M.Sc. in Electrical Engineering, Computer Engineering, or a related subject

• 5+ years of relevant experience post-advanced degree

• Extensive experience with RTL design (preferably Verilog) is a must

• Good knowledge of advanced computer architectures and the RISC-V ISA

• Experience with industry-standard tools for IC design

• Familiarity with the LLVM/MLIR compiler is a plus, but not required

• Good written and verbal English communication skills are required